To meet the requirements for faster performance, the characteristic dimensions of features of integrated circuit devices have continued to be decreased. Manufacturing of devices with smaller feature sizes introduces new challenges in many of the processes conventionally used in semiconductor fabrication. One of the most important of these fabrication processes is photolithography.
Via first trench last (VFTL) copper dual damascene patterning through an low dielectric constant (less than about 3) material or ultra low dielectric constant (less than about 2) material can be very difficult. One of the problems with this type of patterning is the selective removal of the sacrificial fill material from the low dielectric constant materials. Previous work has shown that Si—O fill materials (either UV absorbing or transparent) are the optimum materials platform, if the dielectric layer is Si—O based.
In order to improve the removal selectivity of the sacrificial fill material it must be chemically weakened relative to the dielectric material. A porogen or a high boiling solvent can be added to the fill material to weaken it; however, in order to achieve photoresist developer resistance the Si—O based fill material either needs to be baked to or at a sufficiently high temperature to ensure crosslinking or the porogen content needs to be lowered. Both of these methods designed to achieve photoresist developer resistance work with respect to strengthening the fill material, but the removal selectivity of the fill material is significantly decreased.
Therefore, a desirable coating material is one that a) would be impervious to photoresist developers and methods of production of the coating materials described; b) can satisfy any goals of increasing etch selectivity and/or stripping selectivity; c) is compatible with anti-reflective and/or absorbing layers (BARC—“bottom antireflective coating”), such as organic absorbing compositions and layers, and also low k ILD's; and/or d) can satisfy any goals of minimizing fill bias and voiding in via structures would be desirable to advance the production of layered materials, electronic components and semiconductor components.